Qualcomm Senior Verification Engineer in Paris, France
Senior Verification Engineer
Qualcomm Technologies, Inc.
CDMA Technology at http://www.qualcomm.com/about/businesses/qct
Engineering - Hardware
France - Paris
Business Description and Job Function:
Qualcomm France-QITC develop interconnect for complex SoCs providing low power, higher system bandwidth, grater IP flexibility, fewer global wires and easier timing convergence as well as faster time to market than existing bus interconnects. QITC NoC solution includes a full suite of automated NoC Design Tools that improve designer productivity.
The Job is to verify HDL IP blocks and participate to the development of the verification flow, using the most advanced technology available.
Each engineer has the responsibility to define a verification plan and to verify the blocks features and performance according to the specification.
These include Functional Verification / Checkers development / write and reach all kind of coverage metrics
Bachelor's degree in Science, Engineering, or related field.
2+ years ASIC design, verification, or related work experience.
*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
Skills and Experience:
4 years + in IP hardware verification
Strong Hardware language knowledge: VHDL, Verilog, SystemC
Good C++ knowledge
Understanding of Hardware communication protocols (AXI, AHB, CHI ...)
Understanding of Verification methodology
Strong motivation and team spirit
Working environment: Linux, NCSIM, VCS, SystemVerilog, System C, SCV
- Bachelor's degree in Science, Engineering, or related field.
EEO employer: including race, gender, gender identity, sexual orientation, disability & veterans status.