Qualcomm Sr. Engineer (Signal Integrity) in Hyderabad, India
Sr. Engineer (Signal Integrity)
Qualcomm Technologies, Inc.
Corporate Engineering at http://www.qualcomm.com/about/businesses/qces
Engineering - Hardware
India - Hyderabad
The Power & Signal Integrity Group (PSIG) resides in the Corporate Engineering unit of Qualcomm Technologies, Inc., a leader in wireless communication technology. Engineers in the Power & Signal Integrity Group work with the various business units across Qualcomm to help bring leading edge mobile products to market.
The candidate will work in a team oriented environment with a lead SI/PI engineer to provide electrical design expertise in the areas of signal integrity and power integrity for the design of wireless products and development systems. This engineer will be located in Hyderabad, India with the reference platform design teams to perform analyses and provide guidance on signal and power integrity issues while organizationally being part of PSIG in San Diego, US. Working effectively across organizational boundaries is essential as is the effective documentation and presentation of results. The candidate is expected to work closely with the platform design teams under the direction of an experienced SI engineer while applying established PSIG methodologies. The engineer will have the opportunity to influence the evolution of analysis methodologies.
Perform various IO analyses using established methodologies, potentially from model extraction through simulation and reporting of conclusions. IO types include DDR memory interfaces and variety of serial interfaces.
Analyze and provide design guidance on PCB power distribution networks using established methodologies.
Document, distribute, and present results at appropriate meetings
3 to 7 years of experience in the following areas:
Electromagnetic theory and transmission lines
Basic signal and power integrity concepts
Commercial 3D electromagnetic field solver
Commercial SI or RF analysis tools
SPICE transient simulation including use of IBIS models
The following experience is a plus:
DDR and LPDDR design and analysis
High speed serial IO design and analysis
Ansys, Cadence/Sigrity, Keysight, SI/PI tools, and MATLAB desirable
Spreadsheets and similar productivity tools
Mentor or Cadence board design tools
Minimum Bachelor degree in Electrical Engineering or related discipline with at least 3 years of experience, Master degree preferred
EEO employer: including race, gender, gender identity, sexual orientation, disability & veterans status.