Qualcomm Senior Staff Engineer – Chip Lead in Chennai, India

Job Description:

Job Id

E1963231

Job Title

Senior Staff Engineer – Chip Lead

Post Date

04/18/2018

Company


Division

Qualcomm Technologies, Inc.


CDMA Technology at http://www.qualcomm.com/about/businesses/qct

Job Area

Engineering - Hardware

Location

India - Chennai

Job Overview

The role will require the candidate to understand and work on all aspects of VLSI development from micro architecture, front end design, and various implementation aspects The candidate will need to work with multiple stakeholders in Architecture, Systems, Software, Product and test engineering, various core teams, Verification, DFT, Physical Design teams spread across multi-sites. The candidate will be leading a team and will need to ensure smooth support through to volume production.

Minimum Qualifications

Minimum 10+ years of solid experience in SoC design, with experience managing large teams -Good knowledge of Digital Design and RTL development -Hands-on experience with SoC Design, Verilog RTL coding -Working knowledge of front end flows like spyglass lint, CDC, synthesis -Understanding of Bus protocols (AHB/AXI etc), interconnects, peripherals, DDR, clock & resets -Understanding of Memory controller designs and Microprocessors is desirable -Understanding of Chip IO design and packaging is desirable -Good understanding of the design convergence cycle in terms of architecture, micro-architecture, synthesis, timing closure and verification -Manage IP dependencies, planning and tracking of all front end design related tasks -Driving the project milestones across the design, verification and physical implementations -Experience in managing a team of talented engineers -Needs to make effective and timely decisions, even with incomplete information. -Provides direction, mentoring, and leadership to small to medium sized groups. -Should possess effective communication and leadership skills -Good people management, team work skills and strong positive attitude are essential

Preferred Qualifications

-Minimum 15 years of solid experience in SoC design, with experience managing large teams

-Good knowledge of Digital Design and RTL development

-Hands-on experience with SoC Design, Verilog RTL coding

-Knowledge of 802.11 MAC and PHY wireless protocols and standard is added advantage

-Working knowledge of front end flows like spyglass lint, CDC, synthesis

-Understanding of Bus protocols (AHB/AXI etc), interconnects, peripherals, DDR, clock & resets

-Understanding of Memory controller designs and Microprocessors is desirable

-Understanding of Chip IO design and packaging is desirable

-Good understanding of the design convergence cycle in terms of architecture, micro-architecture, synthesis, timing closure and verification

-Manage IP dependencies, planning and tracking of all front end design related tasks

-Driving the project milestones across the design, verification and physical implementations

-Experience in managing a team of talented engineers

-Needs to make effective and timely decisions, even with incomplete information.

-Provides direction, mentoring, and leadership to small to medium sized groups.

-Should possess effective communication and leadership skills

-Good people management, team work skills and strong positive attitude are essential

Education Requirements

Educational requirement

Required: Bachelor's Engineering

Preferred: Master's Engineering

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