Qualcomm SOC Verification Engineer in Bangalore, India

Job Description:

Job Id

E1962850

Job Title

SOC Verification Engineer

Post Date

04/17/2018

Company


Division

Qualcomm Technologies, Inc.


CDMA Technology at http://www.qualcomm.com/about/businesses/qct

Job Area

Engineering - Verification

Location

India - Bangalore

Job Overview

Job Function You will be contributing/ leading to the Design Verification effort of a complex cutting edge Snapdragon SOCs.

You will be responsible for RTL verification of High Speed interfaces (USB, UFS, PCIE) or Low speed peripherals like SDCC, EMMC, Serial wire interface, I2C, TLMM, JTAG, Scandump or Debug interfaces.

You will be responsible for verification plan definition, DV environment development in SV/UVM, SV /C based test case development, Design verification at RTL level, DV Coverage analysis, Coverage improvement at block and SOC level, System scenario and use case verification, Power and Performance analysis for your blocks in SOC.

Minimum Qualifications

2 + years experience in Design verification.

Expertise in verifying complex designs from system as well as block level, through design flow.

Experience in building SV-UVM test environment / Assertion based verification.

Knowledge on embedded RISC/ARM/DSP processor architecture is basic need.

Experience in coverage closure and test case improve to improve coverage

Experience in SYSTEM VERILOG, UVM, VERA , MODELSIM/VCS/SILOTI

Expertise in High speed peripheral verification or Low speed peripheral verification

Knowledge of JTAG, ScanDump, debug interface verification is an added advantage

Knowledge on Perl or any other scripting language is an added advantage

Understanding of RTL design/verification concept

Prior knowledge on security blocks, JTAG verification is an added advantage

Excellent written and oral communications skills.

Preferred Qualifications

2 + years experience in Design verification.

Expertise in verifying complex designs from system as well as block level, through design flow.

Experience in building SV-UVM test environment / Assertion based verification.

Knowledge on embedded RISC/ARM/DSP processor architecture is basic need.

Experience in coverage closure and test case improve to improve coverage

Experience in SYSTEM VERILOG, UVM, VERA , MODELSIM/VCS/SILOTI

Expertise in High speed peripheral verification or Low speed peripheral verification

Knowledge of JTAG, ScanDump, debug interface verification is an added advantage

Knowledge on Perl or any other scripting language is an added advantage

Understanding of RTL design/verification concept

Prior knowledge on security blocks, JTAG verification is an added advantage

Excellent written and oral communications skills.

Education Requirements

B Tech/ M Tech

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