Qualcomm Software Performance Test Engineer in San Diego, California

Job Description:

Job Id E1956379

Job Title Software Performance Test Engineer

Post Date 06/16/2017

Company-Division Qualcomm Technologies, Inc.

CDMA Technology at http://www.qualcomm.com/about/businesses/qct

Job Area Engineering - Software

Engineering - Test

Location California - San Diego

Job Overview

QCT Core Technologies is looking to hire talented engineers in the processor performance and architecture test group. In this highly visible role, candidates will be working in a dynamic environment, interfacing across multiple disciplines including test, systems, power, software, and hardware engineers to develop innovative architectures that meet the requirements of Qualcomms growing product portfolio. Candidates will be able to gain exposure to the full product life cycle from pre-silicon to commercialization of Qualcomm chipsets.

Product feature/requirement areas include, but are not limited to:

  • Meeting the ever-increasing data rates of 4G/5G

  • Analyzing performance for sensors, audio, and modem DSPs

  • Exploring heterogeneous computing and co-processor architecture

  • IoE/IoT sectors

  • Working with various HLOS on application cores to meet end-to-end performance Responsibilities: As a SW performance and architecture test engineer, candidates will own or participate in one or more of the following:

  • Design, automate and execute test-cases aimed at profiling the processor core and SoC performance across modem and other domains such as sensors, audio DSP, compute DSP etc.

  • Build automated tools for processing vast data sets to draw meaningful conclusions aimed at optimizing SW implementation and system performance

  • Multiple aspects of architectural analysis and modeling, including forecasting CPU/MIPS, bus bandwidth, and memory utilization for current and next generation chipsets to meet the growing product requirements on processors across various subsystems on the SoC

  • Perform detailed analysis of the existing software to provide innovative recommendations to improve performance and memory utilization, including software optimizations, SW/HW partitioning, cache/TCM sizing, etc...

  • Develop tools for silicon profiling, validation and debugging across all SOC components

  • Involvement in pre-silicon evaluations and sign-offs

  • Scope opportunities for HW acceleration

Minimum Qualifications 6 months to 5 years of academic or industry experience in the following:

  • Computer Architecture

  • RTOS

  • Python and/or PERL Scripting

  • C/C++ embedded programming

  • Software/system test

  • Debugging Real-time Systems using JTAG or equivalent

  • Compilers / Linkers

Preferred Qualifications

  • Knowledge of WWAN (UMTS/GERAN/LTE/TDSCDMA), LAN, GPS, technologies

Education Requirements Required: Bachelor's, Computer Engineering and/or Computer Science and/or Electrical Engineering

Preferred: Master's, Computer Engineering and/or Computer Science and/or Electrical Engineering

EEO employer: including race, gender, gender identity, sexual orientation, disability & veterans status.