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Job Information

Qualcomm STA/Timing Lead Engineer in Noida, India

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

  • Responsibilities:

  • STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs Qualcomm Hexagon DSP IP's .

  • Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus.

  • Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation.

  • Evaluate multiple timing methodologies/tools on different designs and technology nodes.

  • Work on automation scripts within STA/PD tools for methodology development.

  • Good Technical writing and Communication skills, should be willing to work in cross-collaborative environment

  • Experience in design automation using TCL/Perl/Python.

  • Familiar with digital flow design implementation RTL to GDS : ICC, Innovous , PT/Tempus

  • Familiar with process technology enablement: Circuit simulations using Hspice/FineSim, Monte Carlo.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

  • Education : B.Tech or MTech/MS in Electrical/Electronics/Microelectronics/VLSI.Preferred Qualification/Skills

  • Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency handling, 0-cycle, multi-cycle path handling

  • Hands-on experience with STA tools - Prime-time, Tempus

  • Have experience in driving timing convergence at Chip-level and Hard-Macro level

  • In-depth knowledge cross-talk noise, Signal Integrity, Layout Parasitic Extraction, feed through handling,

  • Knowledge of ASIC back-end design flows and methods and tools (ICC2, Innovus)

  • Knowledge of Spice simulation Hspice/FineSim, Monte Carlo. Silicon to spice model correlation.

  • Proficient is scripting languages – TCL, Perl, Awk

  • Basic knowledge of device physics

Applicants : If you need an accommodation, during the application/hiring process, you may request an accommodation by sending email to accommodationsupport

Although this role has some expected minor physical activity, this should not deter otherwise qualified applicants from applying. If you are an individual with a physical or mental disability and need an accommodation during the application/hiring process, please call Qualcomm’s toll-free number found here (https://qualcomm.service-now.com/hrpublic?id=hr_public_article_view&sysparm_article=KB0039028) for assistance. Qualcomm will provide reasonable accommodations, upon request, to support individuals with disabilities as part of our ongoing efforts to create an accessible workplace.

Qualcomm is an equal opportunity employer and supports workforce diversity.

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If you would like more information about this role, please contact Qualcomm Careers (http://www.qualcomm.com/contact/corporate) .

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification

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