Qualcomm Senior Analog/Mixed Signal Integrated Circuit Designer in Hsinchu, Taiwan
Job Id E1956475
Job Title Senior Analog/Mixed Signal Integrated Circuit Designer
Post Date 06/19/2017
Company-Division Qualcomm Technologies, Inc.
CDMA Technology at http://www.qualcomm.com/about/businesses/qct
Job Area Engineering - Software
Location Taiwan - Hsinchu
Job Overview We are seeking for Senior Analog/Mixed Signal Integrated Circuit Designers with excellent design skills who will be contributing in a team environment in the development of state-of-the-art CMOS image sensor for use in the computational camera technologies. You will use your skills as an Integrated Circuit designer while applying them to a vast array of process technologies, system applications, and new technology development.
Tasks will include the development of block level definitions and requirements, detailed circuit design and schematic creation, circuit simulation, manual layout, physical verification (Layout vs. Schematic and Design Rule Checking), behavior modelling using Verilog-A or Verilog-AMS, and full chip verification in a variety of silicon process technologies. The right candidate will be comfortable in a dynamic environment with experience in state-of-the-art CMOS image sensor & 3D stacking technologies.
Minimum Qualifications - Advanced degree -either MS or PhD is preferred in Electrical Engineering with proven record in analog and mixed signal design experience. (7+ years with a technical MS or 3+ years with a technical PhD)
Experience with all of the following: Design automatic skills in IC custom design tools (e.g. Cadence or Mentor) for schematic capture, circuit simulation, full custom layout; mixed-signal circuit design experience (Digital and Analog); physical verification skills utilizing Cadence Assura; behavior modelling skills using Verilog-A or Verilog-AMS, and full-chip functional/performance verification methods.
Experience designing PLLs, ADCs, DACs and LDOs (Must have tape-out one of these blocks)
Experience in designing low noise, low power amplifiers, chopper circuits
Familiarity with sub-threshold designs
Excellent understanding of device physics
Experience performing chip level integration
Experience in electronics test lab
Preferred Qualifications NA
Education Requirements Master/ PhD degree of Electrical Engineering
EEO employer: including race, gender, gender identity, sexual orientation, disability & veterans status.