Qualcomm SOC Post Silicon Validation Engineer in Bangalore, India

Job Description:

Job Id T1957187

Job Title SOC Post Silicon Validation Engineer

Company-Division Qualcomm Technologies, Inc.


CDMA Technology at http://www.qualcomm.com/about/businesses/qct

Job Area Engineering - Verification

Location India - Bangalore

Overview Job Function

SoC Post Silicon Validation within Bangalore Design Center is responsible for verifying and validating hardware solutions and to integrate new hardware (IP cores and SoCs) to maximize software productivity and enable faster time to market. The Post-Si organization is central to minimizing the number of chip turns in products, to the efficient transition of sound and reliable HW to SW organizations, and to the development of new validation methodologies.

Post Silicon team is currently looking for self-motivated engineers who will perform device level and system level, validation and debug, in post-Silicon. The ideal candidate should leverage his knowledge and experience to provide leadership, technical guidance, and execution of silicon validation of DSP cores cross multiple projects and platforms.

Responsibilities -Address customer issues by providing guidance, detailed debug and drive issues to resolution.

  • Writing and reviewing validation test plans for Processors (DSP)

  • Create validation suite and build automation

  • Development of directed, random, and pseudo-random diagnostics for validation in compliance with Silicon spec and use cases targeting Qualcomm’s Hexagon Digital Signal Processors(QDSP6)

  • Debug of diagnostics on various platforms using JTAG, Logic Analyzers, Oscilloscopes and similar equipment

  • Interaction with various engineering teams (like system, hardware design and design validation, software engineers, test engineering) in test-environment bring-up & development in order to meet team goals and resolve problems in a timely, effective and professional manner.

Skills/Experience Candidate should have 5-7 years of related experience in SoC post silicon validation.

ARM System-On-Chip Pre-Silicon emulation and Post-Silicon ASIC Validation experience related to board bring up and debug.

Leadership quality, excellent communication, development and documentation of silicon test plans and guidelines for engineers.

Ability to collaborate and coordinate cross teams and sites effectively.

Familiarity with the following:

Lauterbach Trace32 environment..

Experience with assembly and C programming.

Have hands on experience of SOC architecture, micro-processor verification, and silicon debug environment.

Hands on experience of processor programming and simulation.

Knowledge and experience with processor silicon In Circuit debuggers and design for debug techniques.

Knowledge and experience on how to operate advanced logic analyzers, Advanced Oscilloscopes, Protocol Analyzers and power measurement equipments.

Education Requirements Bachelor's, Electrical Engineering

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EEO employer: including race, gender, gender identity, sexual orientation, disability & veterans status.