Qualcomm Physical Design Methodology and Flow Development Architect/Manager in Bangalore, India

Job Description:

Job Id E1955783

Job Title Physical Design Methodology and Flow Development Architect/Manager

Post Date 07/26/2017

Company-Division Qualcomm Technologies, Inc.

CDMA Technology at http://www.qualcomm.com/about/businesses/qct

Job Area Engineering - Hardware

Location India - Bangalore

Job Overview To define and develop solution for physical design flow, SOC integration and PPA optimization of high performance and low power cores.

The candidate will develop and qualify the methodology and implementation flow in advanced technologies like 10nm and below.

The candidate will be working closely with Foundries, QCT process team, physical verification team and Physical design team.

Responsibilities include:

  • Enablement of advanced RTL2GDSII flow for high performance and extreme low power cores.

  • Develop reference flows, enabling end2end implementation and sign-off with best-in class PPA

  • Work with QCOM process and technology team to identify the design rules to improve die-size, routability, DFM.

  • Design bottleneck analysis for optimization of tools/flows

Minimum Qualifications 10+years relevant industry experience with:

  • SOC design flow, synthesis, PnR/extraction/power analysis tools

  • UPF

  • Design rules/DRM, calibre runs

  • Digital implementation tools from Synopsys or Cadence

  • Proficient in UNIX and Perl

  • STA and characterization, UPF/CPF views, Verilog modeling

Preferred Qualifications Experience with Makefile, Tcl/Tk, PERL, HTML, C+ Education Requirements Required: Bachelor's, Electrical Engineering

Preferred: Master's, Electrical Engineering


EEO employer: including race, gender, gender identity, sexual orientation, disability & veterans status.